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ams datasheet: 2014-jun-27 [v1-02] AS5047D C 1 AS5047D 14-bit on-axis magnetic rotary position sensor with 11-bit decimal & binary incremental pulse count the AS5047D is a high-resolution rotary position sensor for fast absolute angle measurement over a full 360-degree range. this new position sensor is equipped with revolutionary integrated dynamic angle error compensation (daec?) with almost 0 latency and offers a robust desi gn that suppresses the influence of any homogenous external stray magnetic field. a standard 4-wire spi serial interface allows a host microcontroller to read 14-bit absolute angle position data from the AS5047D and to program non-volatile settings without a dedicated programmer. incremental movements are indicated on a set of abi signals with a maximum resolution of 2000 steps / 500 pulses per revolution in decimal mode and 2048 steps / 512 pules per revolution in binary mode. the resolution of the abi signal is programmable and can be reduced to 32 steps per revolution, or 8 pulses per revolution. brushless dc (bldc) motors are controlled through a standard uvw commutation interface with a programmable number of pole pairs from 1 to 7. the ab solute angle position is also provided as pwm-encoded output signal the AS5047D is available as a single die in a compact 14-pin tssop package. ordering information and content guide appear at end of datasheet. general description
AS5047D C 2 ams datasheet: 2014-jun-27 [v1-02] general description key benefits & features the benefits and features of AS5047D, 14-bit on-axis magnetic rotary position sensor with 11-bit decimal & binary incremental pulse count are listed below: figure 1: added value of using the AS5047D applications the AS5047D is ideally suit ed to support bldc motor commutation for the most challeng ing industrial applications such as factory automation, bu ilding automation, robotics, pmsm (permanent magnet synchronous motor) and stepper motors closed loop in as well optical encoder replacement. benefits features easy to use C saving costs on dsp dae c? dynamic angle error compensation good resolution for motor & position control 14-bit core resolution simple optical encoder replacement abi programmable decimal and binary pulse-count: 500, 400, 300, 200, 100, 50, 25, 8, 512, 256 ppr no programmer needed (via spi command) zero position, configuration programmable versatile choice of the interface independent output interfaces: spi, abi, uvw, pwm lower system costs (no shielding) immune to external stray field
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 3 general description block diagram the functional blocks of this device for reference are shown below: figure 2: AS5047D block diagram vdd3v3 a/d volatile memory spi ldo AS5047D vdd gnd csn mosi scl miso i/pwm a b w / pwm u v analog front-end uwv atan (cordic) agc otp interpolator hall sensors pwm decoder selectable on i or w abi dynamic angle error compensation
AS5047D C 4 ams datasheet: 2014-jun-27 [v1-02] pin assignment figure 3: tssop-14 pin assignment figure 4: pin description pin number pin name pin type description 1 csn digital input spi chip select (active low) 2clkdigital inputspi clock 3 miso digital output spi master data input, slave output 4 mosi digital input spi master data output, slave input 5 test test pin (connect to ground) 6 b digital output incremental signal b 7 a digital output incremental signal a 8 w/pwm digital output commutation signal w or pwm 9 v digital output commutation signal v 10 u digital output commutation signal u 11 vdd power supply 5v power supply voltage for on-chip regulator 12 vdd3v3 power supply 3.3v on-chip low-dropout (ldo) output. requires an external decoupling capacitor (1uf) 13 gnd power supply ground 14 i digital output incremental signal i (index) or pwm pin assignment AS5047D csn clk miso mosi test b a i / pwm gnd vdd3v vdd u v w / pwm
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 5 absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only. functional operation of the device at these or any other conditions beyond those indicated under operating conditions is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. figure 5: absolute maximum ratings symbol parameter min max units note vdd5 dc supply voltage at vdd pin -0.3 7.0 v vdd3 dc supply voltage at vdd3v3 pin -0.3 5.0 v v ss dc supply voltage at gnd pin -0.3 0.3 v v in input pin voltage vdd+0.3 v i scr input current (latch-up immunity) -100 100 ma norm: aec-q100-004 esd electrostatic discharge 2 kv norm: aec-q100-002 p t total power dissipation (all supplies and outputs) 150 mw ta5v0 ambient temperature 5v0 -40 125 c in the 5.0v power supply mode only ta3v3 ambient temperature 3v3 -40 125 c in the 3.3v power supply mode if noiseset = 0 taprog programming temperature 5 45 c programming @ roomtemperature (25c 20c) t strg storage temperature -55 150 c t body package body temperature 260 c norm: ipc/jedec j-std-020 humidity non-condensing 5 85 % moisture sensitivity level 3 represents a maximum floor lifetime of 168h absolute maximum ratings
AS5047D C 6 ams datasheet: 2014-jun-27 [v1-02] electrical characteristics all limits are guaranteed. the parameters with min and max values are guaranteed with production tests or sqc (statistical quality control) methods. figure 6: electrical characteristics symbol parameter conditions min typ max units vdd positive supply voltage 5.0v operation mode 4.5 5.0 5.5 v vdd3v3 positive supply voltage 3.3v operation mode; only from -40 to 125c 3.0 3.3 3.6 v vdd_burn positive supply voltage supply voltage required for programming in 3.3v operation 3.3 3.5 v v reg regulated voltage voltage at vdd3v3 pin if vdd vdd3v3 3.2 3.4 3.6 v v poron internal por-on level at power-on (vdd rising from 0 to 5.0v) 2.47 2.83 v v poroff internal por-off level at power-off (vdd falling from 5.0 to 0v) 2.24 2.56 v v porh internal por hysteresis 170 mv i dd supply current 15 ma v ih high-level input voltage 0.7 vdd v v il low-level input voltage 0.3 vdd v v oh high-level output voltage vdd-0.5 v ol low-level output voltage v ss +0.4 v i_out current on digital output 4ma electrical characteristics
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 7 magnetic characteristics figure 7: magnetic specifications note(s) and/or footnote(s): 1. it is possible to operate the AS5047D below 35mt with reduced noise performance. figure 8: system specifications symbol parameter conditions min max unit bz orthogonal magnetic field strength, normal operating mode required orthogonal component of the magnetic field strength measured at the die's surface along a circle of 1.1mm 35 70 mt symbol parameter conditions min typ max units res core resolution 14 bit res_abi resolution of the abi interface programmable with register setting ( abires ) 32 2048 steps per revolution inl opt @ 25c non-linearity, optimum placement of the magnet 0.8 deg inl opt+temp non-linearity optimum placement of the magnet over the full temperature range 1 deg inl dis+temp non-linearity @ displacement of magnet and temperature -40c to 150c assuming n35h magnet (d=8mm, h=3mm) 500um displacement in x and y z-distance @ 2000um 1.2 deg onl rms output noise (1 sigma) orthogonal component for the magnetic field within the specified range (bz), noiseset = 0 0.068 degree on_pwm rms output noise (1 sigma) on pwm interface orthogonal component for the magnetic field within the specified range (bz) 0.068 degree t delay system propagation delay Ccore reading angle via spi 90 110 s magnetic characteristics system characteristics
AS5047D C 8 ams datasheet: 2014-jun-27 [v1-02] timing characteristics reference magnet: n35h, 8mm diameter; 3mm thickness. figure 9: timing specifications t delay_ daec system propagation delay after dynamic angle error correction. at abi and uvw interfaces 1.5 1.9 s t sampl sampling rate refresh rate at spi 225 250 275 ns dae 1700 dynamic angle error at 1700 rpm constant speed 0.02 degree dae max dynamic angle error at 14500 rpm constant speed 0.18 degree dae acc dynamic angle error at constant acceleration (25krad/s2) 25k radians/s2 constant acceleration 0.175 degree ms maximum speed 14500 rpm symbol parameter conditions min typ max units t pon power-on time 10 ms symbol parameter conditions min typ max units timing characteristics
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 9 detailed description the AS5047D is a hall-effect magnetic sensor using a cmos lateral technology. the lateral hall sensors convert the magnetic field component perpendicular to the surface of the chip into a voltage. the signals from the hall sensors are amplified and filtered by the analog front-end (afe) before being converted by the analog-to-digital converter (adc). the output of the adc is processed by the hardwired cordic (coordinate rotating digital computer) block to compute the angle and magnitude of the magnetic vector. the in tensity of the magnetic field (magnitude) is used by the automatic gain control (agc) to adjust the amplification level for compensation of the temperature and magnetic field variations. the internal 14-bit resolution is available by reading a register through the spi interface. the resolution on the abi output can be programmed from 2048 to 32 steps per revolution. the dynamic angle error compensation block corrects the calculated angle for latency using a linear prediction calculation algorithm. at constant rotation speed the latency time is internally compensated by the AS5047D, reducing the dynamic angle error at the spi, abi and uvw outputs. the AS5047D allows to switch off the uvw output interface to display the absolute angle as pwm-encoded signal on the pin w. at higher speeds, the interpolator fills in missing abi pulses and generates the uvw signals with no loss of resolution. the non-volatile settings in the AS5047D can be programmed through the spi interface without any dedicated programmer. power management the AS5047D can be either powered from a 5.0v supply using the on-chip low-dropout regulator or from a 3.3v voltage supply. the ldo regulator is not intended to power any other loads, and it needs a 1 f capacitor to ground located close to the chip for decoupling as shown in figure 10 . in 3.3v operation, vdd and vreg must be tied together. figure 10: 5.0v and 3.3v power supply options detailed description 1f 100n f 4.5 - 5.5v vdd3v3 gnd vdd 5.0v operation ldo AS5047D 100n f 3.0 ? 3.6v vdd3v3 gnd vdd 3.3v operation ldo AS5047D
AS5047D C 10 ams datasheet: 2014-jun-27 [v1-02] detailed description after applying power to the chip, the power-on time ( t pon ) must elapse before the AS5047D provides the first valid data. dynamic angle error compensation the AS5047D uses 4 integrated hall sensors which produce a voltage proportional to the orthogonal component of the magnetic field to the die. these voltage signals are amplified, filtered, and converted into the digital domain to allow the cordic digital block to calculate the angle of the magnetic vector. propagation of these signals through the analog front-end and digital back-end generates a fixed delay between the time of measurement and the availability of the measured angle at the outputs. this la tency generates a dynamic angle error represented by the product of the angular speed ( )and the system propagation delay ( t delay ): dae = x t delay the dynamic angle compensation block calculates the current magnet rotation speed ( ) and multiplies it with the system propagation delay ( t delay ) to determine the correction angle to reduce this error. at constant speed, the residual system propagation delay is t delay_daec . the angle represented on the pwm interface is not compensated by the dynamic angle error compensation algorithm. it is also possible to disable the dynamic angle error compensation with the setting daecdis . disabling the dynamic angle error compensati on gives a noise benefit of 0.016 degree rms.this setting can be advantageous for low speed (under 100rpm) respec tively static positioning applications. spi interface (slave) the spi interface is used by a host microcontroller (master) to read or write the volatile memory as well as to program the non-volatile otp registers. the AS5047D spi only supports slave operation mode. it communicates at clock rates up to 10 mhz. the AS5047D spi uses mode=1 (cpol=0, cpha=1) to exchange data. as shown in figure 11 , a data transfer starts with the falling edge of csn (scl is low). the AS5047D samples mosi data on the falling edge of scl. spi commands are executed at the end of the frame (rising edge of csn). the bit order is msb first. data is protected by parity.
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 11 detailed description spi timing the AS5047D spi timing is shown in figure 11 . figure 11: spi timing diagram figure 12: spi timing parameter description min max units t l time between csn falling edge and clk rising edge 350 ns t clk serial clock period 100 ns t clkl low period of serial clock 50 ns t clkh high period of serial clock 50 ns t h time between last falling edge of clk and rising edge of csn tclk / 2 ns t csn high time of csn between two transmissions 350 ns t mosi data input valid to falling clock edge 20 ns t miso clk edge to data output valid 20 ns t oz release bus time after cs rising edge. 10 ns csn (input) clk (input) mosi (input) miso (output) t clk t l t mosi t miso t oz t oz t h t csn t clkl t clkh data[15] data[15] data[14] data[14] data[0] data[0]
AS5047D C 12 ams datasheet: 2014-jun-27 [v1-02] detailed description spi transaction an spi transaction consists of a 16-bit command frame followed by a 16-bit data frame. figure 13 shows the structure of the command frame. figure 13: spi command frame to increase the reliability of communication over the spi, an even parity bit parc must be generated and sent. a wrong setting of the parity bit causes the parerr bit in the error flag register to be set. the parity bit is calculated from the 16-bit command frame. the 16-bit command specifies whether the transaction is a read or a write and the address. figure 14 shows the read data frame. figure 14: spi read data frame the data is sent on the miso pin. the parity bit pard is calculated by the AS5047D for the 16-bit data frame. if an error is detected in the previous spi command frame, the ef bit is set high. the spi read is sampled on the rising edge of csn and the data is transmitted on miso with the next read command, as shown in figure 15 . bit name description 15 parc parity bit (even) calculated on the command frame 14 r/w 0: write 1: read 13:0 addr address to read or write bit name description 15 pard parity bit (even) for the data frame 14 ef 0: no command frame error occurred 1: error occurred 13:0 data data
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 13 detailed description figure 15: spi read figure 16: spi write data frame the parity bit pard must be calculated from the 16-bit data. in an spi write transaction, the write command frame (e.g. write add[n]) is followed by a data frame (e.g. data [x]). in addition to writing an address in the AS5047D, a write command frame causes the old contents of the addressed register (e.g. data [y]) to be sent on miso in the follow ing frame. this is followed by the new contents of the addressed register (data [x]) as shown in figure 18 . bit name description 15 pard parity bit (even) 14 0 always low 13:0 data data read add[n] read add[k] csn read add[p] data add[n] data add[p] read add[m] data add[k] command command command command data data data mosi miso
AS5047D C 14 ams datasheet: 2014-jun-27 [v1-02] detailed description figure 17: spi write transaction volatile registers the volatile registers are shown in figure 18 . each register has a 14-bit address. figure 18: volatile register table reading the nop register is equivalent to a nop (no operation) instruction for the AS5047D. address name default description 0x0000 nop 0x0000 no operation 0x0001 errfl 0x0000 error register 0x0003 prog 0x0000 programming register 0x3ffc diaagc 0x0180 diagnostic and agc 0x3ffd mag 0x0000 cordic magnitude 0x3ffe angleunc 0x0000 measured angle without dynamic angle error compensation 0x3fff anglecom 0x0000 measured angle with dynamic angle error compensation write add[n] csn mosi miso data (x) data (y) write (addm) data (p) next command data (y) data (y) data (x) command command command data to write into add[n] data content of add[n] new data content of add[n] data content of add[m] new data content of add[m] data to write into add[n]
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 15 detailed description figure 19: errfl (0x0001) reading the errfl register automatically clears its contents (errfl=0x0000). figure 20: prog (0x0003) the prog register is used for programming the otp memory. (see programming the zero position.) figure 21: diaagc (0x3ffc) name read/write bit position description parerr r 2 parity error invcomm r 1 invalid command error: set to 1 by reading or writing an invalid register address frerr r 0 framing error: is set to 1 when a non-compliant spi frame is detected name read/write bit position description progver r/w 6 program verify: must be set to 1 for verifying the correctness of the otp programming progotp r/w 3 start otp programming cycle otpref r/w 2 refreshes the non-volatile memory content with the otp programmed content progen r/w 0 program otp enable: enables programming the entire otp memory name read/write bit position description magh r 11 diagnostics : magnetic field strength too low; agc=0xff magl r 10 diagnostics : magnetic field strength too high; agc=0x00 cof r 9 diagnostics : cordic overflow lf r 8 diagnostics : offset compensation lf=0:internal offset loops not ready regulated lf=1:internal offset loop finished agc r 7:0 automatic gain control value
AS5047D C 16 ams datasheet: 2014-jun-27 [v1-02] detailed description figure 22: mag (0x3ffd) figure 23: angle (0x3ffe) figure 24: anglecom (0x3fff) non-volatile registers (otp) a nonvolatile memory (one-time programmable) is used store the zero position of the magnet and custom settings. figure 25: non-volatile register table figure 26: zposm (0x0016) name read/write bit position description cmag r 13:0 cordic magnitude information name read/write bit position description cordicang r 13:0 angle information without dynamic angle error compensation name read/write bit position description daecang r 13:0 angle information with dynamic angle error compensation address name default description 0x0016 zposm 0x0000 zero position msb 0x0017 zposl 0x0000 zero position lsb /mag diagnostic 0x0018 settings1 0x0000 custom setting register 1 0x0019 settings2 0x0000 custom setting register 2 0x001a red 0x0000 redundancy register name read/write/program bit position description zposm r/w/p 7:0 8 most significan t bits of the zero position
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 17 detailed description figure 27: zposl (0x0017) figure 28: settings1 (0x0018) name read/write/program bit position description zposl r/w/p 5:0 6 least significant bits of the zero position comp_l_error_en r/w/p 6 this bit enables the contribution of magh (magnetic field strength too high) to the system_error comp_h_error_en r/w/p 7 this bit enables the contribution of magl (magnetic field strength too low) to the system_error name read/write/program bit position description factory setting r 0 pre-programmed to 1 noiseset r/w/p 1 noise setting dir r/w/p 2 rotation direction uvw_abi r/w/p 3 defines the pwm output (0 = abi is operating, w is used as pwm 1 = uvw is operating, i is used as pwm) daecdis r/w/p 4 disable dynamic angle error compensation (0 = dae compensation on, 1 = dae compensation off ) abibin r/w/p 5 abi decimal or binary selection of the abi pulses per revolution dataselect r/w/p 6 this bit defines which data can be read form address 16383dec (3fffhex). 0->daecang 1->cordicang pwmon r/w/p 7 enables pwm (setting of uvw_abi bit necessary)
AS5047D C 18 ams datasheet: 2014-jun-27 [v1-02] detailed description figure 29: settings2 (0x0019) figure 30: red (0x001a) name read/write/program bit position description uvwpp r/w/p 2:0 uvw number of pole pairs (000 = 1, 001 = 2, 010 = 3, 011 = 4, 100 = 5, 101 = 6, 110 = 7, 111 = 7) hys r/w/p 4:3 hysteresis setting abires r/w/p 7:5 resolution of abi name read/write/program bit position description redundancy r/w/p 4:0 redundancy bits. this field enables with force to high one bit of the non-volatile register map after a non-successful burning. for more details please refer to the application note an5000 C as5147_redundancy_bits
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 19 detailed description abi incremental interface the AS5047D can send the an gle position to the host microcontroller through an incremental interface. this interface is available simultaneously with the other interfaces. by default, the incremental interface is set to work at the highest resolution 2000 step per revolution, or 500 pulses per revolution (ppr). it is possible to select between a decimal and binary pulses per revolution, respectively with the bit abibin and select the pulses per revolution with the bit abires as shown in figure 31 . figure 31: abi resolution setting the phase shift between the si gnals a and b indicates the rotation direction: e.g. dir-bit = 0, clockwise (b leads, a follows) or counterclockwise (a leads, b follows). during the start-up time, after power on to the chip, all three abi signals are high. abires abibin steps per revolution pulses per revolution 000 0 2000 500 001 0 1600 400 010 0 1200 300 011 0 800 200 100 0 400 100 101 0 200 50 110 0 100 25 111 0 32 8 000 1 2048 512 001 1 1024 256
AS5047D C 20 ams datasheet: 2014-jun-27 [v1-02] detailed description figure 32: abi signals at 11-bit resolution the figure 32 shows the abi signal flow if the magnet rotates in clockwise direction, placing the magnet on the top of the AS5047D and looking at the magnet from the top (dir=1). with the bit dir , it is possible to invert the rotation direction. 012345678 n-1 n-2 n-3 n-4 n-5 n-6 1 2 3 4 5 6 7 0 n-1 n-2 n-3 n-4 a b i n-7 steps clockwise rotation counter-clockwise rotation
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 21 detailed description uvw commutation interface the AS5047D can emulate the uvw signals generated by the three discrete hall switches commonly used in bldc motors. the uvwpp field in the settings register selects the number of pole pairs of the motor (from 1 to 7 pole pairs). the uvw signals are generated wi th 14-bit resolution. during the start-up time, after power on of the chip, the uvw signals are low. figure 33: uvw signals the figure 32 shows the uvw signal flow if the magnet rotates in clockwise direction, placing the magnet on the top of the AS5047D and looking at the magnet from the top (dir=1). with the bit dir , it is possible to invert the rotation direction. u v w electrical angle 0 60 180 240 120 300 360
AS5047D C 22 ams datasheet: 2014-jun-27 [v1-02] detailed description pwm the pwm can be enabled with th e bit setting pwmon. the pwm encoded signal is displayed on the pin w or the pin i. the bit setting uvw_abi defines which output is used as pwm.the pwm output consists of a frame of 4119 pwm clock periods, as shown in figure 34 . the pwm frame has the following sections: ? 12 pwm clocks for init ? 4 pwm clocks for error detection ? 16 pwm clock periods high ? 4095 pwm clock periods of data ? 8 pwm clock periods low the angle is represented in the data part of the frame with a 12-bit resolution. one pwm clock period represents 0.088 degree and has a typical duration of 444 ns. if the embedded diagnostic of the AS5047D detects any error the pwm interface displays only 12 clock periods high (0.3% duty-cycle). figure 34: pulse width modulation encoded signal time 0 1 2 3 4 5 6 7 8 4095 4094 4093 4092 4091 4090 4089 data 8 clock pulse low 16 clock pulse high init error_n
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 23 detailed description hysteresis the hysteresis can be programmed in the hys bits if the settings2 register and depends on the chosen resolution of the incremental interface ( abires ), as shown in the figure 35 . figure 35: hysteresis settings automatic gain control (agc) and cordic magnitude the AS5047D uses agc to compensate for variations in the magnetic field strength due to changes of temperature, air gap between the chip and the magnet, and demagnetization of the magnet. the automatic gain control value can be read in the agc field of the diaagc register. within the specified input magnetic field strength ( bz ), the automatic gain control works in a closed loop and keeps the cordic magnitude value ( mag) constant. below the minimum input magnetic field strength, the cordic magnitude decreases and the magl bit is set. diagnostic features the AS5047D supports embe dded self-diagnostics. magl : magnetic field strength too high, set if agc = 0xff . this indicates the non-linearity error may be increased. magh : magnetic field strength too low, set if agc = 0x00 . this indicates the output noise of the measured angle may be increased. cof : cordic overflow. this indicates the measured angle is not reliable. lf : offset compensation completed. at power-up, an internal offset compensation procedure is started, and this bit is set when the procedure is completed. hys hysteresis (degree) - abires 1600 steps per revolution hysteresis (degree) - abires 1024 steps per revolution 00 0.53 0.7 01 0.35 0.35 10 0.175 no hysteresis 11 no hysteresis 1.05
AS5047D C 24 ams datasheet: 2014-jun-27 [v1-02] detailed description ocf error / cof error in case of an ocf or cof error, all outputs are changing into a safe state: spi output: informatio n in the diaagc (0x3ffc) register. the angle information is still valid. pwm output: pwm clock period 13 - 16 of the first 16 pwm clock periods = low. additional there is no angle information valid (all 4096 clock periods = low) abi output : the state of abi is frozen to abi = 111 uvw output : the state of uvw is frozen to uvw = 000 magh error /magl error default diagnostic setting for magh error /magl error: in case of a magh error or magl error, there is no safe state on the pwm,abi or uvw outputs if comp_h_error_en= 0 & comp_h_error_en = 0. the device is operating with the performance as explained. the error flags can be read out with the diaagc (0x3ffc) register. enhanced diagnosis setting for magh error / magl error: in case of a magh error or magl error, the pwm,abi or uvw outputs are going into a safe state if comp_h_error_en= 1 & comp_h_error_en = 1. spi output: informatio n in the diaagc (0x3ffc) register. the angle information is still valid, if the magh or magl error flag is on. pwm output: pwm clock period 13 - 16 of the first 16 pwm clock periods = low. additional there is no angle information valid (all 4096 clock periods = low) abi output : the state of abi is frozen to abi = 111 uvw output : the state of uvw is frozen to uvw = 000 important: when comp_(h/l)_error_en is enabled a marginal magnetic field input can cause toggling of magh or magl which will lead to toggling of the abi/uvw outputs between operational mode and failure mode.
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 25 application information burn and verification of the otp memory step-by-step procedure to permanently program the non-volatile memory (otp): the programming can either be performed in 5v operation using the internal ldo (1uf on regulator output pin), or in 3v operation but using a supply voltage between 3.3v and 3.5v. 1. power on cycle 2. write the settings1 and settings2 registerswith the custom settings for this appl ication (bit0 of settings1 is a factory bit. for programming its mandatory to set this bit to 0). 3. position the magnet at the desired zero position 4. read out the measured angle from the angle register 5. write angle [5:0] into the zposl register and angle [13:6] into the zposm register 6. read reg(0x0016) to reg(0x0019) read register step1 7. comparison of written content (settings and angle) with content of read register step1 (removing of bit0 of settings1 from the comparison is mandatory. bit0 is preprogrammed) 8. if point 7 is correct, enable otp read / write by setting progen = 1 in the prog register 9. start the otp burn procedure by setting progotp = 1 in the prog register 10. read the prog register until it reads 0x0000 (programming procedure complete) 11. clear the memory content writing 0x00 in the whole non-volatile memory 12. enable otp read / write by setting progen = 1 in the prog register 13. set the progver = 1 to set the guard band for the guard band test (1) . 14. refresh the non-volatile memory content with the otp content by setting otpref = 1 15. read reg(0x0016) to reg(0x0019) read register step2 16. comparison of written content (settings and angle) with content of read register step2. mandatory: guard band test (removing of bit0 of settings1 from the comparison is mandatory. bit0 is preprogrammed) 17. new power on cycle, if point 16 is correct. if point 16 fails, the test with the guard band test 1 was not successful and the device is incorrectly programmed. a reprogramming is not allowed! 18. read reg(0x0016) to reg(0x0019) read register step3 application information
AS5047D C 26 ams datasheet: 2014-jun-27 [v1-02] application information 19. comparision of written content (settings and angle) with content of read register step3(removing of bit0 of settings1 from the comparison is mandatory. bit0 is preprogrammed). 20. if point 19 is correct, the progra mming was successful. if point 19 fails, device is inco rrectly programmed. a reprogramming is not allowed 1. guard band test: - restricted to temperature range: 25 c 20 c - right after the programming pr ocedure (max. 1 hour with same - conditions 25c 20 c) - same vdd voltage the guard band test is only for the verification of the burned otp fuses during the programming sequence. a use of the guard band in other cases is not allowed.
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 27 application information figure 36: otp memory burn and verification flowchart correct start write reg(0x0018) write reg(0x0019) set the magnet to the zero position write reg(0x0017(5:0))= reg(0x3fff(5:0)) reg(0x0016(7:0))= reg(0x3fff(13:6)) read reg(0x0016) reg(0x0017) reg(0x0018) reg(0x0019) write reg(0x0003)=0x08 write reg(0x0016)=0x00 reg(0x0017)=0x00 reg(0x0018=0x00 reg(0x0019)=0x00 power-on cycle read reg(0x0016) reg(0x0017) reg(0x0018) reg(0x0016) write reg(0x0003)=0x40 verify 2 correct read angle write angle into zposl and zposm read reg(0x3fff) read register step 1 comparison of written content (settings and angle) with content of read register step 1* unlock otparea for read/write (progen=1) read otp_ctrl set guardband refresh memory with otp content read register step 2 comparison of written content (settings and angle) with content of read register step 2* mandatory guardband-test read register step 3 verify 1 clear memory start otp burning procedure (progotp=1) power on cycle AS5047D settings position of the magnet to the zero position write reg(0x0003)=0x01 write reg(0x0003)=0x08 read reg(0x0003) reg(0x0003)=0x00 no otp burning procedure complete if reg(0x0003) =0x00 yes unlock otparea for read/write (progen=1) write reg(0003)=0x04 read reg(0x0016) reg(0x0017) reg(0x0018) reg(0x0016) guardbandtest fails. wrong programming. reprogramming not allowed not correct verify 3 comparison of written content (settings and angle) with content of read register step 3* end wrong programming reprogramming not allowed not correct end correct programming and verification correct not correct * during the comparison the bit0 of settings1 ha s to be ignored. this bit is pre-programmed.
AS5047D C 28 ams datasheet: 2014-jun-27 [v1-02] application information figure 37: minimum circuit diagram for the AS5047D note(s) and/or footnote(s): 1. in terms of emc and for remote applic ation, additional circuits are necessary. AS5047D csn clk miso mosi test a b gnd vdd3v vdd u v w 4.5 ? 5.5v 1f 100nf mcu vdd gnd i
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 29 package drawings & markings the axis of the magnet must be aligned over the center of the package. figure 38: package outline drawing note(s) and/or footnote(s): 1. dimensioning and tolerancing conform to asme y14.5m - 1994. 2. all dimensions are in millimeters. angles are in degrees. 3. n is the total number of terminals. package drawings & markings symbol min nom max a--1.20 a1 0.05 - 0.15 a2 0.80 1.00 1.05 b0.19-0.30 c0.09-0.20 d 4.90 5.00 5.10 e - 6.40 bsc - e1 4.30 4.40 4.50 e - 0.65 bsc - l 0.45 0.60 0.75 l1 - 1.00 ref - symbol min nom max r0.09- - r1 0.09 - - s0.20- - 10o - 8o 2-12 ref- 3-12 ref- aaa - 0.10 - bbb - 0.10 - ccc - 0.05 - ddd - 0.20 - n14
AS5047D C 30 ams datasheet: 2014-jun-27 [v1-02] package drawings & markings figure 39: packaging code figure 40: package marking yy ww m zz @ last two digits of the current year manufacturing week plant identifier free choice / traceability code sublot identifier AS5047D yywwmzz @
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 31 mechanical data figure 41: angle detection by default (no zero position programmed) mechanical data AS5047D a s 5 0 0 4 7 d s n AS5047D a s 5 0 4 7 d a s 5 0 4 7 d s n AS5047D 0 4 7 d a s 5 0 s n AS5047D a s 5 0 4 7 d a s 5 0 4 7 d s n 0 deg 90 deg 180 deg 270 deg
AS5047D C 32 ams datasheet: 2014-jun-27 [v1-02] ordering & contact information figure 42: ordering information online product information is available at www.ams.com/AS5047D buy our products or get free samples online at: www.ams.com/icdirect technical support is available at: www.ams.com/technical-support for further information and requests, e-mail us at: ams_sales@ams.com for sales offices, distributors and representatives, please visit: www.ams.com/contact headquarters ams ag tobelbaderstrasse 30 8141 unterpremstaetten austria, europe tel: +43 (0) 3136 500 0 website: www.ams.com ordering code package marking delivery form delivery quantity AS5047D-atst tssop-14 AS5047D 13 tape&reel in dry pack 4500 AS5047D-atsm tssop-14 AS5047D 7 tape&reel in dry pack 500 ordering & contact information
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 33 rohs compliant & ams green statement rohs: the term rohs compliant means that ams products fully comply with current rohs directives. our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, rohs compliant products are suitable for use in specif ied lead-free processes. ams green (rohs compliant and no sb/br): ams green defines that in addition to rohs compliance, our products are free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material). important information: the information provided in this statement represents ams knowledge and belief as of the date that it is provided. ams bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are unde rway to better integrate information from third parties. ams has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams and ams suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. rohs compliant & ams green statement
AS5047D C 34 ams datasheet: 2014-jun-27 [v1-02] copyrights & disclaimer copyright ams ag, tobelbader strasse 30, 8141 unterpremstaetten, austria-europe. trademarks registered. all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. devices sold by ams ag are covered by the warranty and patent indemnification provisions appe aring in its general terms of trade. ams ag makes no warranty, express, statutory, implied, or by description regarding th e information set forth herein. ams ag reserves the right to ch ange specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with ams ag for current information. this product is intended for use in commercial applications. applications requiring extended temperature range, unusual environmental requirements, or high reliability applications , such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams ag for each application. this product is provided by ams ag as is and any express or implied wa rranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any th ird party shall arise or flow out of ams ag rendering of technical or other services. copyrights & disclaimer
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 35 document status document status product status definition product preview pre-development information in this datasheet is based on product ideas in the planning phase of development. all specifications are design goals without any warranty and are subject to change without notice preliminary datasheet pre-production information in this datasheet is based on products in the design, validation or qualif ication phase of development. the performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice datasheet production information in this datashee t is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams ag standard warranty as given in the general terms of trade datasheet (discontinued) discontinued information in this datasheet is based on products which conform to specifications in accordance with the terms of ams ag standard warranty as given in the general terms of trade, but these products have been superseded and should not be used for new designs document status
AS5047D C 36 ams datasheet: 2014-jun-27 [v1-02] revision information note(s) and/or footnote(s): 1. page numbers for the previous version may di ffer from page numbers in the current revision changes from 1-01 (2014-jun-17) to current revision 1-02 (2014-jun-27) page (1) updated figure 21 15 updated figure 28 17 updated abi incremental interface section 19 updated uvw commutation interface section 21 updated figure 34 22 updated diagnostic features section 23 updated application information section 25 updated figure 36 27 revision information
ams datasheet: 2014-jun-27 [v1-02] AS5047D C 37 content guide 1 general description 2 key benefits & features 2 applications 3 block diagram 4 pin assignment 5absolute maximum ratings 6 electrical characteristics 7 magnetic characteristics 7 system characteristics 8 timing characteristics 9 detailed description 9power management 10 dynamic angle error compensation 10 spi interface (slave) 11 spi timing 12 spi transaction 14 volatile registers 16 non-volatile registers (otp) 19 abi incremental interface 21 uvw commutation interface 22 pwm 23 hysteresis 23 automatic gain control (agc) and cordic magnitude 23 diagnostic features 24 ocf error / cof error 24 magh error /magl error 25 application information 25 burn and verificati on of the otp memory 29 package drawings & markings 31 mechanical data 32 ordering & contact information 33 rohs compliant & ams green statement 34 copyrights & disclaimer 35 document status 36 revision information content guide

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